Members

Dr. Aydin Aysu

I tackle hardware security problems from all abstraction levels.

Arsalan Malik

I am keen towards side channel attacks and creating defences for FPGAs used in standalone/shared (cloud) environment using cryptographic techniques.

Digvijay Anand

I am currently working on secure ML accelerator design.

Ashley Kurian

I am currently working on physical side channel attacks targeting the extraction of hyperparameters and parameters of neural networks.

Zinedine Hamoudi

I am interested in side-channel analysis of lattice-based post-quantum cryptography.

Rahul Magesh

Building efficient implementations of Post-Quantum Cryptography (PQC) Algorithms at the Hardware (RTL) Level.

Steve Qiu

I aim to identify the side channel vulnerabilities on post quantum algorithms and provide mitigation on these vulnerabilities.

Harshvadan Mihir

I am currently working on testing various Fault Injection attacks on edge/IoT devices running AI/ML workloads and exploring defense strategies to mitigate them.

Modini Ayyagari

Exploring physical side-channel attacks on AI/ML hardware and devising efficient defenses against these attacks.

Sharath Pendyala

Skilled FPGA and RTL Design Engineer dedicated to pushing the boundaries of hardware design and development.

Daisy Kiptoo

I am currently researching system security using graph theory, working across the HECTOR lab (ECE) and SMMT group (MSE).

Varsha Subramanya

I am currently researching system security using graph theory, working across the HECTOR lab (ECE) and SMMT group (MSE).